Technical Field
The present invention relates to a power semiconductor module.
Background Art
Power semiconductor modules used as semiconductor devices are roughly categorized into insulated power semiconductor modules and non-insulated power semiconductor modules. A non-insulated power semiconductor module is a power semiconductor module that does not independently have an insulating function; instead, a device on which the non-insulated power semiconductor module is installed is equipped with an insulating function and serves the insulating function of the power semiconductor module. A non-insulated power semiconductor module is particularly employed for a device that requires low inductance. Non-insulated power semiconductor modules are described in Patent Document 1, Patent Document 2, and Patent Document 3.
FIGS. 4 and 5 respectively show a plan view and a cross-sectional view of an example of a non-insulated power semiconductor module.
A power semiconductor module 101 shown in FIGS. 4 and 5 is equipped with a metal base 2, which serves as a conductive plate.
Semiconductor chips 3, which serve as semiconductor elements, are electrically connected and fixed on the metal base 2. In the illustrated example, a plurality of semiconductor chips 3 are provided on the metal base 2. A drain electrode formed on the bottom surface of each of the semiconductor chips 3 is joined to the metal base 2 by a joining material not shown in the diagram, such as solder.
In addition to the semiconductor chips 3, a multilayer substrate 4 is joined on the metal base 2. The multilayer substrate 4 is constituted by: an insulating plate 41; a metal plate 42 provided on one surface of the insulating plate 41 and joined to the multilayer substrate by a joining material not shown in the diagram, such as solder; and a circuit plate 43 (43a and 43b) that is provided on the other surface of the insulating plate 41 and that forms prescribed circuits.
Additionally, one end of a metal terminal 5 is electrically connected and fixed to the circuit plate 43a of the multilayer substrate 4. The other end of the metal terminal 5 protrudes out of a case 6, in which the semiconductor chips 3 and the multilayer substrate are housed. The semiconductor chips 3 and the multilayer substrate 4 are sealed inside the case 6 by an insulating material 7, such as a thermosetting resin.
In order to electrically connect the semiconductor chip 3 and the multilayer substrate 4, a source electrode formed on the top surface of the semiconductor chip 3 is connected to the circuit plate 43a of the multilayer substrate 4 by bonding wiring 108. Additionally, a gate electrode formed on the top surface of the semiconductor chip 3 is connected to the circuit plate 43b of the multilayer substrate 4 by the bonding wiring 108.
The power semiconductor module 101 shown in FIGS. 4 and 5 is a non-insulated type, since the semiconductor chips 3 are electrically connected and fixed to the metal base 2, and is also a module with low inductance. Additionally, a plurality of power semiconductor modules 101 can be used in series by stacking the same on top of each other and applying pressure. This is because the top end of the metal terminal 5 of the power semiconductor module 101 placed on a lower side is in contact with the metal base 2 of the power semiconductor module 101 placed on an upper side, thereby achieving electrical continuity. Further, the power semiconductor module 101 is structured such that when pressure is applied by stacking a plurality of modules on top of each other, stress is not applied to the semiconductor chips 3.